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About the role
As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You’ll architect and develop DV infrastructure, create and execute comprehensive test plans, and ensure robust verification and coverage for complex chips. Your collaboration with designers, architects, and software teams will help guarantee seamless integration and optimal performance of Cisco’s hardware platforms. You will: Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Experience in System Verilog or UVM methodology
- Experience building reusable and scalable test benches from scratch
- Experience with scripting using Perl and/or Python
More about this role
The application window is expected to close on: 12/17/2026
This is an onsite role based in San Jose, CA.
The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You’ll architect and develop DV infrastructure, create and execute comprehensive test plans, and ensure robust verification and coverage for complex chips. Your collaboration with designers, architects, and software teams will help guarantee seamless integration and optimal performance of Cisco’s hardware platforms. You will:
- Architect,...
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