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ASIC DFT DV Technical Leader (Hybrid)

Cisco · San Jose, California, US · On-site

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About Cisco

Cisco is a worldwide technology leader powering an inclusive future for all. Learn more about our products, services, solutions, and innovations. Backed by Sequoia and Menlo.

About the role

Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the design Found on 1752vc Careers, the job board for startup and VC roles.

What they're looking for

  • Bachelors + 8 years of related experience, or Masters + 6 years of related experience, or PhD + 3 years of related experience
  • Prior experience in test planning based on complex design specification
  • Prior experience in testbench development using System Verilog
  • Experience debugging using DVE/Verdi
  • Experience with TCL, Python or Perl
  • UVM and advanced System Verilog knowledge
More about this role

The application window is expected to close on: 11/12/2026

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the design

Collaborate with the design/design-verification and PD teams to enable the integration and validation of the test logic in all phases of the implementation and post silicon validation flows. Work with the team on Innovative Hardware DFT & test strategy aspects for new silicon device models, bare die &...

Read the full posting on Cisco's site ↗

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