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Senior ASIC Engineer - Post Silicon Validation

Cisco · San Jose, California, US · On-site

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About Cisco

Cisco is a worldwide technology leader powering an inclusive future for all. Learn more about our products, services, solutions, and innovations. Backed by Sequoia and Menlo.

About the role

In this role as a Post-Silicon Validation Engineer, you will be responsible for: Planning and setting up Silicon Bring-up infrastructure, including system boot, initialization, and Power-On of ASICs.

What they're looking for

  • Bachelor's degree in Electrical or Computer Engineering and 7+ years experience, a Master's degree with 4+ years of experience, or a PhD with 1+ years of experience
  • Prior experience in post-silicon validation, bring-up, and debug with ASICs
  • Prior experience in early silicon bring-up, debug, and validation
  • Prior experience bringing up standard peripheral interfaces (I2C, SPI, JTAG) and protocols (PCIe, Ethernet)
  • Prior experience working with firmware, bootloaders, and low-level silicon debug environments, fluency in C, Python, and scripting for validation automation
  • Experience with memory subsystems (HBM, DDR)
More about this role

The application window is expected to close on: 11/09/2026

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

In this role as a Post-Silicon Validation Engineer, you will be responsible for:

Planning and setting up Silicon Bring-up infrastructure, including system boot, initialization, and Power-On of ASICs.

Working closely with design, verification, and board teams to root-cause and resolve functional and electrical issues.

Preparing the Validation Test plan and executing functional and performance testing targeting IP, Subsystem, and full-chip stress testing and corner case analysis.

Developing and extending post-silicon...

Read the full posting on Cisco's site ↗

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