About Google
Learn more about Google. Explore our innovative AI products and services, and how we. Backed by Kleiner Perkins.
About the role
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Experience in any one domain of silicon engineering through internships, academic research, or publications: architecture and RTL, verification and validation, physical design and circuits, systems, test or CAD
- Experience with one of the hardware description languages (e.g., Verilog, SystemVerilog) or programming (e.g., Python, Tcl, Perl, or C++)
More about this role
- Responsibilities and projects will be determined based on your background, interest, and skills.
- Collaborate cross-functionally across hardware and software teams to research, design, and model custom silicon solutions and AI accelerators.
- Develop, simulate, and verify architectural features, digital blocks, or subsystem interfaces targeting performance, power, and area optimizations.
- Contribute to EDA design automation flows, tooling infrastructure, or post-silicon bring-up and characterization.
PhD degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- Experience in any one domain of silicon engineering through internships, academic research, or publications: architecture and RTL, verification and validation, physical design and circuits, systems, test or CAD.
- Experience with one of the hardware description languages (e.g., Verilog, SystemVerilog) or programming (e.g., Python, Tcl, Perl, or C++).
- Research experience in specialized areas such as high-performance/low-power architectures, domain-specific accelerators (DSAs/TPUs), memory hierarchies, coherent interconnects (e.g., CXL, PCIe, UCIe,...
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