Designed for your current needs and future ambitions, Marvell delivers the data infrastructure technology transforming tomorrow’s enterprise, cloud, automotive, and carrier architectures for the better.
About the role
As a Senior Staff Digital ASIC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the high performance connectivity silicon that underpins AI scale data centers for the world’s leading hyperscalers. Our group architects and implements advanced digital pipelines, high speed datapaths, and DSP driven processing engines that enable ultra high bandwidth, low latency data movement across next generation Ethernet and optical interconnects. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Extensive experience in digital ASIC design , including micro‑architecture development, RTL implementation (SystemVerilog preferred), and integration of complex logic blocks
- 3-10+ years of industry experience working on large‑scale ASICs for networking, data‑center connectivity, or high‑bandwidth compute architectures. 5-10+ yrs with Bachelor's, or 3-5+ yrs with Master's or PhD
- Familiarity with Ethernet protocols and networking standards , including MAC, PCS framing, flow control, and packet‑level behaviors
- Proficiency with front‑end design flows , including lint, CDC/RDC, synthesis, STA, and power/performance optimization
- Demonstrated ability to collaborate across architecture, verification, physical design, firmware, and systems teams , driving designs from concept through tape‑out
- Strong debug skills across RTL simulation, emulation, FPGA prototypes, and silicon bring‑up
More about this role
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
As a Senior Staff Digital ASIC Design Engineer at Marvell, you will join the DCE – Connectivity Business Group, the team developing the high performance connectivity silicon that underpins AI scale data centers for the world’s leading hyperscalers. Our group architects and implements advanced digital pipelines, high speed datapaths, and DSP driven processing engines that enable ultra high bandwidth, low latency data movement across next generation Ethernet and optical interconnects. You’ll work closely with experts in architecture, verification, physical design, and systems to deliver complex ASICs that integrate cutting edge DSP algorithms, robust...
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