We make the best chips physically possible for the large model needs of frontier labs.
About the role
Contribute to MatX's compute subsystem verification methodology with a scalable solution across blocks, subsystems, fullchip, and system-level validation Own portions of verification execution at the subsystem level / blocks within the subsystem, and create testbenches, tests, and related artifacts to achieve structural and functional coverage closure Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- At least 5 years of silicon design-verification experience
- End-to-end, concept-to-silicon tapeout experience — has driven verification from an architecture and/or design specification through design freeze and tapeout to production silicon
- Production experience with conventional/advanced verification methodologies — SystemVerilog and UVM, assertion-based verification (ABV), comfort with both formal and simulated verification
- Experience with Python, C/C++, and similar scripting and programming languages for verification and silicon modeling
- Production experience creating portable tests and drivers that apply to silicon validation and post-silicon debug
- Strong understanding of silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), memory management, and related functionalities
More about this role
MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability.
The compute subsystem implements all of the core numerics and the associated control and data paths required to realize meaningful hardware acceleration of our target ML workloads.
Contribute to MatX's compute subsystem verification methodology with a scalable solution across blocks, subsystems, fullchip, and system-level validation
Own portions of verification execution at the subsystem level / blocks within the subsystem, and create testbenches, tests, and related artifacts to achieve structural and functional coverage closure
Qualify one or more pieces of the software stack on the subsystem
Plan and drive intermediate and sign-off reviews on verification test plans, execution progress, and verification closure toward various silicon milestones including design freeze and tapeout
At least 5 years of silicon design-verification experience
End-to-end, concept-to-silicon tapeout experience — has driven verification from an architecture and/or design specification through design freeze and tapeout to production...
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