About MaxLinear
Backed by Battery.
About the role
MaxLinear is seeking a Senior Principal Digital Design Engineer to join our team. In this role, you will focus on the following:
What they're looking for
- Expert in digital design including micro-architecture definition and area/power/timing optimization
- Solid understanding of high-speed interfaces (Ethernet/PCIe), particularly MAC/PCS (or Transaction/Data Link/PHY logical) layers, and associated clocking, reset, and CDC considerations
- Experience with performance modeling and analysis, including performance constraint identification and optimization
- Knowledge of communications/DSP/FEC algorithms and experience with power/area efficient fixed-point ASIC implementation a plus
- Familiar with SoC integration, including clock/reset architecture, bus protocols, embedded CPUs
- Strong logical and creative problem-solving skills with excellent analytical and debugging skills
More about this role
MaxLinear is seeking a Senior Principal Digital Design Engineer to join our team. In this role, you will focus on the following:
- Define microarchitecture for complex subsystems (e.g., 200/400G 802.3, PCIe 6/7, DSP, FEC, data compression, AI/HW accelerators)
- Analyze standards (PCI-SIG, IEEE 802.3, UALink, etc) and translate into implementable RTL
- Work with cross-functional project teams (DV, PD, System/Firmware) to define product specifications (PPA), system architecture, HW/SW partitioning, and execution plan
- Lead improvements to design methodology to maximize efficiency and predictability
- RTL implementation in SystemVerilog of communication/DSP/packet-processing functions
- Block-level verification including creation of Verilog or UVM testbenches
- System-level verification in UVM+SysC environments including test case creation/debug, functional coverage specification, and code coverage analysis
- Perform preliminary synthesis and power estimation, including SDC constraint specification and vector-driven power analysis
- Perform design quality checks including lint, CDC and DFT-readiness checks
- Support emulator-based verification including debug of SW driven test...
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