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Engineer/ Sr Memory Layout Engineer-DPG-LPDDR

Micron Technology · Hyderabad - Phoenix Aquila, India · On-site

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About Micron Technology

Micron is a global leader in memory and storage, powering AI and compute-intensive applications from cloud to edge with innovative semiconductor solutions.

About the role

As a Senior Memory Layout Engineer-DPG-LPDDR at Micron, you will work on innovative memory and storage solutions. These solutions help transform data into intelligence quickly. You will join a dedicated team collaborating to develop world-class products that set industry standards.

What they're looking for

  • Hands-on experience on Bit cell layout creation and pitch matching
  • Strong exposure on Row decoder (XDEC) and column decoder (YDEC) layout development
  • 2+ years of proven experience in memory and full-custom layout development
  • Memory array hierarchy and decode path understanding
  • Proficient with Cadence Virtuoso for custom layout implementation
  • Solid experience with Calibre DRC/LVS including debug and closure
More about this role

Our vision is to transform how the world uses information to enrich life for all .

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a Senior Memory Layout Engineer-DPG-LPDDR at Micron, you will work on innovative memory and storage solutions. These solutions help transform data into intelligence quickly. You will join a dedicated team collaborating to develop world-class products that set industry standards.

  • Hands-on experience on Bit cell layout creation and pitch matching
  • Strong exposure on Row decoder (XDEC) and column decoder (YDEC) layout development
  • 2+ years of proven experience in memory and full-custom layout development
  • Memory array hierarchy and decode path understanding
  • Proficient with Cadence Virtuoso for custom layout implementation
  • Solid experience with Calibre DRC/LVS including debug and closure
  • Strong understanding of DRAM/LPDDR memory architecture , array organization, and peripheral integration
  • Apply strong device physics expertise to drive high‑quality layout implementation,...

Read the full posting on Micron Technology's site ↗

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