Micron is a global leader in memory and storage, powering AI and compute-intensive applications from cloud to edge with innovative semiconductor solutions.
About the role
As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field, with a minimum of 10 years of experience in a related field
- Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies
- Experience with the RTL‑to‑GDS flow, including synthesis, static timing analysis, and develop sign‑off considerations
- Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens
- Programming or scripting experience (e.g., Python, TCL, Perl, or shell scripting)
More about this role
Our vision is to transform how the world uses information to enrich life for all .
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets.
This is a hands-on technical role passionate about RTL build, IP integration, debugging, and pre/post-silicon support. (LLM)
- Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die.
- Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic).
- Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL...
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