Micron is a global leader in memory and storage, powering AI and compute-intensive applications from cloud to edge with innovative semiconductor solutions.
About the role
This role owns next‑generation HBM core‑die architecture and critical DRAM circuit design that directly impact bandwidth, power, area, thermal efficiency, and long‑term reliability. The engineer will drive architecture definition, circuit feasibility, and Architecture Reference Design (ARD) development across advanced 3D‑stacked HBM products. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Own HBM core‑die architecture including Bank/Bank‑Group organization, array partitioning, datapath, refresh, and reliability features
- Drive critical DRAM circuit design and timing closure for row, column, sensing, and datapath paths
- Develop and optimize architecture solutions for bandwidth, power, area, thermal, and reliability trade‑offs
- Define and validate refresh, row‑hammer mitigation, data‑retention, and power‑efficient operation schemes
- Lead architecture feasibility studies using transistor‑level simulation and physical implementation analysis
- Develop HBM Architecture Reference Designs (ARD), including golden schematics, timing budgets, and verification methodology
More about this role
Our vision is to transform how the world uses information to enrich life for all .
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
HBM Core-Die Architecture & Circuit Design Engineer
This role owns next‑generation HBM core‑die architecture and critical DRAM circuit design that directly impact bandwidth, power, area, thermal efficiency, and long‑term reliability. The engineer will drive architecture definition, circuit feasibility, and Architecture Reference Design (ARD) development across advanced 3D‑stacked HBM products. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making.
Key Responsibilities
- Own HBM core‑die architecture including Bank/Bank‑Group organization, array partitioning, datapath, refresh, and reliability features
- Drive critical DRAM circuit design and timing closure for row, column, sensing, and datapath paths
- Develop and optimize architecture solutions for bandwidth, power, area, thermal, and reliability trade‑offs
- Define and...
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