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Principal Design Engineer - IP Office

Microsoft · Mountain View, CA, US; Hillsboro, OR, US; Redmond, WA, US · On-site

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About the role

Establish yourself as an integral member of AI SoC design team for the development of AI components with focus on best-in-class IP selection, QA and ensuring smooth integration in the SoCs. Identifying new value-adding, best-in-class IPs in the areas of PLL, DTS, Droop-Detector, HBM4,224 G Ethernet, GPIOs etc Facilitate selection of the most suitable IPs for targeted SoC landing-zones Architect robust process for IP release, update, QA, integration and pre/post silicon validations Track release and updates of the...

More about this role

Establish yourself as an integral member of AI SoC design team for the development of AI components with focus on best-in-class IP selection, QA and ensuring smooth integration in the SoCs. Identifying new value-adding, best-in-class IPs in the areas of PLL, DTS, Droop-Detector, HBM4,224 G Ethernet, GPIOs etc Facilitate selection of the most suitable IPs for targeted SoC landing-zones Architect robust process for IP release, update, QA, integration and pre/post silicon validations Track release and updates of the IPs and ensure appropriate integration Ensure quality of incoming IPs and facilitate smooth integrations by working closely with Logic design and Physical design teams. Interface with architecture, physical design (PD), design for test (DFT), and other teams to optimize tradeoffs within the design Provide technical leadership through mentorship and teamwork Established reputation in interactions with leading suppliers of IPs in 112G/224G class Ethernet, PCIe 5/6, HBM3/4 * Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer...

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