Neurophos develops photonic AI processing technology that focuses on hardware solutions for accelerating artificial intelligence inference by replacing traditional electronic compute elements with Optical Processing Units (OPUs). Backed by Purple Arch Ventures.
About the role
Neurophos is looking for a Silicon Photonics Engineer to lead the receiver (Rx) photonic integrated circuit for our OPU platform, including the T100 optical AI inference chip. You will own the Rx PIC from photodetector device design through chip-level architecture: how light reaches the chip, how it is coupled and routed, and how large photodetector arrays convert it into clean, high-speed electrical signals for the TIAs. You will take designs through tapeout and silicon validation. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- PhD in a relevant field, such as Electrical Engineering, Applied Physics, or Physics
- 3 years of relevant experience in high-speed silicon photonics, focused on photodetectors and receiver PICs
- Hands-on design experience with Ge-on-Si (or equivalent) high-speed photodetectors, including the trade-offs among responsivity, bandwidth, capacitance, and dark current
- Proficiency with photonic and device simulation tools (e.g., Lumerical/Ansys, COMSOL, Synopsys TCAD, or equivalent) and with circuit-level modeling of photodetectors
- Experience laying out and taping out in a silicon photonics foundry PDK (e.g., KLayout, gdsfactory, Cadence Virtuoso, or equivalent)
- Working knowledge of optical receiver fundamentals: TIA interfacing, noise, sensitivity, and PAM4 signal integrity
More about this role
The demand for new data centers and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck means rethinking the fundamental architecture of inference compute. The industry's current path can't meet the need, so we're taking a different approach.
Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference.
We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others.
Join us and shape...
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