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Normal Computing · Mountain View · On-site

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About Normal Computing

Normal is rethinking semiconductors from the ground up. Normal EDA - Normal deploys AI software to accelerate complex hardware engineering with zero defects – all in one unified EDA platform. Normal ASICs - With the help of Normal EDA and our closest... Backed by Drive Capital.

About the role

In partnership with our engineering leads, you will break down company objectives into actionable milestones across the engineering org. You will own the schedule across the entire product development lifecycle: silicon, systems and software. You will surface information in a digestible format so that engineering executives are acutely aware of the current state of the project. You will also help to resolve issues across teams. Your work will ensure we ship on time. Found on 1752vc Careers, the job board for startup and VC roles.

More about this role

Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), and London.

In partnership with our engineering leads, you will break down company objectives into actionable milestones across the engineering org. You will own the schedule across the entire product development lifecycle: silicon, systems and software. You will surface information in a digestible format so that engineering executives are acutely aware of the current state of the project. You will also help to resolve issues across teams. Your work will ensure we ship on time.

Break down company objectives into actionable milestones across the engineering org.

Own the schedule across the silicon development cycle (architecture, micro-architecture, RTL generation, verification, logic synthesis, design for test, physical design, physical verification, tapeout, packaging, post-silicon testing, bring-up and post-silicon...

Read the full posting on Normal Computing's site ↗

Engineering Strategy & Operations

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