Your silicon. Your models. Your roadmap. Flexible AI accelerator IP that is powering the next generation of AI chips. Backed by Pear VC.
About the role
Quadric is building a revolutionary new processor-based SoC architecture. As a Staff SoC RTL Engineer , you will get in on the ground floor as a key member of our chip design team, contributing across all stages of the SoC design and integration cycle. In this role, you will help define the SoC architecture, own subsystem development, integrate third-party IP, and drive PPA optimization to bring our next-generation platform to life.
What they're looking for
- BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field
- Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience
- Proficiency in SystemVerilog or Verilog
- Strong background in computer architecture, low-power digital design techniques, and deep technical knowledge in at least one subsystem (Memory, I/O, or Compute)
- Proven experience with SoC subsystems (including 3rd-party IP) and working knowledge of VCS & Verilog/C Co-Simulation
More about this role
Quadric is redefining edge AI with the industry's first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Our technology powers intelligent edge devices across automotive, industrial, robotics, and embedded systems.
Founded in 2016 and based in downtown Burlingame, California, Quadric is building the world's first supercomputer designed for the real-time needs of edge devices. Quadric aims to empower developers in every industry with superpowers to create tomorrow's technology, today. The company was co-founded by technologists from MIT and Carnegie Mellon, who were previously the technical co-founders of the Bitcoin computing company 21.
Quadric is building a revolutionary new processor-based SoC architecture. As a Staff SoC RTL Engineer , you will get in on the ground floor as a key member of our chip design team, contributing across all stages of the SoC design and integration cycle. In this role, you will help define the SoC architecture, own subsystem development, integrate third-party IP, and drive PPA optimization to bring our next-generation platform to...
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