Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial,...
About the role
This role will drive verification strategy and execution for complex digital designs, working closely with design teams to ensure functionality, performance, and product requirements are met. The ideal candidate brings deep semiconductor verification expertise with SystemVerilog and UVM . Previous DDR or memory experience is an advantage, but is not required. Are you ready to join our team and shape the future with us? Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field
- Extensive experience in semiconductor design verification , with demonstrated technical ownership of complex verification efforts
- Expert-level proficiency with SystemVerilog
- Significant hands-on experience with UVM (Universal Verification Methodology) , including development and optimization of UVM-based verification environments
- Experience defining verification strategies and developing verification plans from design and product specifications
- Strong experience with functional verification, constrained-random testing, functional coverage, checkers, debugging, and coverage closure
More about this role
We are seeking a Principal Design Verification Engineer to provide technical leadership for verification of next-generation semiconductor memory interface products, including data buffer silicon.
This role will drive verification strategy and execution for complex digital designs, working closely with design teams to ensure functionality, performance, and product requirements are met. The ideal candidate brings deep semiconductor verification expertise with SystemVerilog and UVM . Previous DDR or memory experience is an advantage, but is not required.
This is an opportunity to take significant technical ownership while contributing to next-generation DDR6 technology .
Key Responsibilities
- Lead verification strategy and execution for complex semiconductor designs at the block and system level .
- Define verification methodologies, test plans, coverage strategies, and verification environments.
- Architect, develop, maintain, and optimize SystemVerilog/UVM testbenches and verification environments .
- Drive test development, functional coverage, checkers, constrained-random verification, and coverage closure.
- Take technical ownership of verification for assigned blocks,...
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