Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial,...
About the role
Renesas is seeking an experienced Principal Verification Engineer to lead the verification efforts for our Automotive PMIC (Power Management Integrated Circuit) product line. This role combines deep expertise in mixed-signal verification methodology with strong leadership capabilities to mentor junior engineers and drive verification strategy across multiple product platforms.
What they're looking for
- • MS or PhD in Electrical Engineering, Computer Engineering, or related
- • 12+ years of experience in mixed-signal or analog circuit verification
- • Deep understanding of all aspects of mixed-signal verification environment architecture and implementation
- • Hands-on experience with Real Number Model (RNM) and AMS (Analog Mixed Signal) model integration
- • Proficiency in RTL and behavioral simulation tools (e.g., Spectre, Xcelium)
- • Strong understanding of Gate-Level Simulation (GLS) flows and ability to set up and debug GLS simulations
More about this role
Position Overview
Renesas is seeking an experienced Principal Verification Engineer to lead the verification efforts for our Automotive PMIC (Power Management Integrated Circuit) product line. This role combines deep expertise in mixed-signal verification methodology with strong leadership capabilities to mentor junior engineers and drive verification strategy across multiple product platforms. The ideal candidate will have comprehensive knowledge of analog, digital, and mixed-signal verification techniques, combined with hands-on experience debugging complex automotive power management systems.
Key Responsibilities
• Design and architect mixed-signal verification environments, including Real Number Model (RNM) and AMS (Analog Mixed Signal) model integration for PMIC designs
• Develop and implement comprehensive verification plans and strategies for automotive PMIC products, ensuring compliance with automotive safety standards (ISO 26262, AEC-Q200)
• Set up and optimize Gate-Level Simulation (GLS) flows, correlating with RTL simulation results to identify and resolve discrepancies
• Lead debugging activities for complex analog blocks including switched-mode regulators, Linear...
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