Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial,...
About the role
In this role, you will work at the intersection of IC design, advanced package development, and system-level implementation. As a Staff-level contributor, you will serve as the technical focal point, guiding the architecture and physical design of next-generation, high-performance semiconductor packages, including 2.5D/3D heterogeneous integration, chiplet-based architectures, high-density interposers, and advanced substrate technologies. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- Advanced Packaging Expertise: Strong background in advanced substrate-based packages, flip-chip layout, multi-die/chiplet-based architectures, thermal mitigation, and high-density routing
- CAD Proficiency: High proficiency with industry-standard package design tools, specifically Siemens/Mentor Xpedition (Layout / Substrate Integrator), Valor NPI, and/or Cadence Allegro Package Designer / SiP Layout
- Cross-Disciplinary Acumen: Working understanding of SI/PI fundamentals, impedance control, crosstalk mitigation, and the ability to balance these constraints against pin budgets and platform integration requirements
More about this role
In this role, you will work at the intersection of IC design, advanced package development, and system-level implementation. As a Staff-level contributor, you will serve as the technical focal point, guiding the architecture and physical design of next-generation, high-performance semiconductor packages, including 2.5D/3D heterogeneous integration, chiplet-based architectures, high-density interposers, and advanced substrate technologies.
This role requires deep expertise in advanced packaging R&D, cross-domain co-design, and the ability to define methods and procedures for complex, multi-die integration assignments. You will lead cross-functional alignment with global silicon design, signal integrity/power integrity (SI/PI), thermal, and product engineering teams, while driving the creation of new packaging design rules and methodologies.
- Physical Architecture Leadership: Lead package layout architecture and physical design for next-generation heterogeneous integration, including 2.5D/3D chiplet packaging, high-density interposers, bridge technologies (e.g., EMIB equivalents), RDL, and advanced FCBGA solutions.
- Methodology & Design Rules: Define, establish, and optimize...
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