Upscale builds next-generation AI network infrastructure with scalable systems, intelligent automation, and seamless connectivity.
About the role
We are building a world-class SerDes engineering organization to enable next-generation, ultra-high-speed connectivity for AI data centers and high-performance computing. We are seeking an exceptional technical leader to define the clocking architecture for next-generation SerDes, spanning ultra-low-jitter phase-locked loops (PLLs) and high-performance clock distribution networks. Found on 1752vc Careers, the job board for startup and VC roles.
What they're looking for
- MS or PhD in Electrical Engineering or a related field, with extensive experience in high-performance analog and mixed-signal IC design
- Demonstrated success designing and delivering ultra-low-jitter PLLs (100 fs-class RMS integrated jitter) in advanced CMOS technologies at 5nm or below
- Deep expertise in PLL architecture and circuit design, including phase detectors or phase-frequency detectors, charge pumps where applicable, loop filters, oscillators, frequency dividers, and loop dynamics
- Strong understanding of phase noise, integrated jitter, reference spurs, loop stability, supply-induced jitter, and the impact of clock quality on high-speed SerDes performance
- Proven ability to define clocking architectures and translate stringent system-level jitter requirements into circuit-level specifications and implementation strategies
- Experience with clock distribution design and the management of coupling, skew, power integrity, and electromagnetic interactions
More about this role
Upscale, Inc., is building the high-performance infrastructure powering the next generation of artificial intelligence. Backed by over $500M in funding and rapid global adoption, we are scaling systems designed for the world’s most demanding AI workloads.
We focus on first-principles engineering across silicon, systems, and networking—where performance, scale, and execution are critical. Our team is talent-dense and high-performing. We value ownership, technical rigor, and speed, and we offer the opportunity to work on foundational problems with immediate, real-world impact.
If you’re looking to do high-impact work, move fast, and help define the infrastructure behind the future of AI—Upscale is where you can produce meaningful work at the frontier—and operate at a high standard.
We are building a world-class SerDes engineering organization to enable next-generation, ultra-high-speed connectivity for AI data centers and high-performance computing.
We are seeking an exceptional technical leader to define the clocking architecture for next-generation SerDes, spanning ultra-low-jitter phase-locked loops (PLLs) and high-performance clock distribution networks.
This is a senior...
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